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PD - 94501
AUTOMOTIVE MOSFET
Features
l l l l l l
HEXFET(R) Power MOSFET
D
IRLR2908 IRLU2908
VDSS = 80V
Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax
G S
RDS(on) = 28m ID = 30A
Description
Specifically designed for Automotive applications, this HEXFET (R) Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this HEXFET power MOSFET are a 175C junction operating temperature, low RJC, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.\ The D-Pak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU series) is for through-hole mounting applications. Power dissipation levels up to 1.5 watts are possible in typical surface mount applications.
D-Pak IRLR2908
I-Pak IRLU2908
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C ID @ TC = 25C IDM PD @TC = 25C VGS EAS EAS (tested) IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (See Fig. 9) Continuous Drain Current, VGS @ 10V (Package Limited) Pulsed Drain Current
Max.
39 28 30 150 120 0.77 16 180 250 See Fig.12a,12b,15,16 2.3 -55 to + 175
Units
A
Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy (Thermally Limited) Single Pulse Avalanche Energy Tested Value
W W/C V mJ A mJ V/ns C
h Peak Diode Recovery dv/dt e
Repetitive Avalanche Energy Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Avalanche Current
i
d
300 (1.6mm from case )
Thermal Resistance
Parameter
RJC RJA RJA Junction-to-Case Junction-to-Ambient (PCB Mount) Junction-to-Ambient
Typ.
Max.
1.3 40 110
Units
C/W
jA
--- --- ---
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1
02/13/03
IRLR2908/IRLU2908
Static @ TJ = 25C (unless otherwise specified)
Parameter
V(BR)DSS VDSS/TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. Typ. Max. Units
80 --- --- --- 1.0 35 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- 0.085 22.5 25 --- --- --- --- --- --- 22 6.0 11 12 95 36 55 4.5 7.5 1890 260 35 1920 170 310 --- --- 28 30 2.5 --- 20 250 200 -200 33 9.1 17 --- --- --- --- --- --- --- --- --- --- --- --- pF nH ns nC nA V S A V m
Conditions
VGS = 0V, ID = 250A VGS = 10V, ID = 23A VGS = 4.5V, ID = 20A VDS = 25V, ID = 23A VDS = 80V, VGS = 0V VDS = 80V, VGS = 0V, TJ = 125C VGS = 16V VGS = -16V ID = 23A VDS = 64V VGS = 4.5V VDD = 40V ID = 23A RG = 8.3 VGS = 4.5V
V/C Reference to 25C, ID = 1mA
f f
VDS = VGS, ID = 250A
f
D G
Between lead, 6mm (0.25in.) from package and center of die contact VGS = 0V VDS = 25V = 1.0MHz, See Fig. 5
S
VGS = 0V, VDS = 1.0V, = 1.0MHz VGS = 0V, VDS = 64V, = 1.0MHz VGS = 0V, VDS = 0V to 64V
Diode Characteristics
Parameter
IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
--- --- --- --- --- --- --- --- 75 210 39 A 150 1.3 110 310 V ns nC
Conditions
MOSFET symbol showing the integral reverse
G S D
p-n junction diode. TJ = 25C, IS = 23A, VGS = 0V TJ = 25C, IF = 23A, VDD = 25V di/dt = 100A/s
f
f
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes through are on page 11
HEXFET(R) is a registered trademark of International Rectifier.
2
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IRLR2908/IRLU2908
1000
TOP VGS 15V 10V 4.5V 4.0V 3.5V 3.0V 2.7V 2.5V
1000
TOP VGS 15V 10V 4.5V 4.0V 3.5V 3.0V 2.7V 2.5V
ID, Drain-to-Source Current (A)
100
ID, Drain-to-Source Current (A)
100
BOTTOM
10
BOTTOM
2.5V
1
10
2.5V
1
0.1
20s PULSE WIDTH Tj = 25C
0.01 0.01 0.1 1 10 100 0.1 0.01 0.1
20s PULSE WIDTH Tj = 175C
1 10 100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
60
ID, Drain-to-Source Current ()
G FS , Forward Transconductance (S)
TJ = 25C 50
100
40 T J = 175C
T J = 175C T J = 25C
30
10
20
VDS = 25V 20s PULSE WIDTH
1 2 3 4 5
10 VDS = 10V 20s PULSE WIDTH 0 0 10 20 30 40 50 60
VGS , Gate-to-Source Voltage (V)
ID, Drain-to-Source Current (A)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance vs. Drain Current
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3
IRLR2908/IRLU2908
100000 VGS = 0V, f = 1 MHZ Ciss = C gs + Cgd, C ds SHORTED Crss = Cgd Coss = Cds + Cgd
5.0 ID= 23A
VGS , Gate-to-Source Voltage (V)
4.0
VDS= 64V VDS= 40V VDS= 16V
10000
C, Capacitance(pF)
Ciss
1000
3.0
Coss
100
2.0
Crss
1.0
10 1 10 100
0.0 0 5 10 15 20 25
VDS, Drain-to-Source Voltage (V)
Q G Total Gate Charge (nC)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
1000.00
1000 OPERATION IN THIS AREA LIMITED BY R DS(on)
100.00
T J = 175C
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100
100sec 10 1msec 1 Tc = 25C Tj = 175C Single Pulse 0.1 1 10 10msec
10.00
1.00
T J = 25C
VGS = 0V 0.10 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 VSD, Source-to-Drain Voltage (V)
100
1000
VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRLR2908/IRLU2908
40 35 30
ID, Drain Current (A)
RDS(on) , Drain-to-Source On Resistance
3.0
ID = 38A
2.5
VGS = 4.5V
25 20 15 10 5 0 25 50 75 100 125 150 175 T C , Case Temperature (C)
2.0
(Normalized)
1.5
1.0
0.5
0.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
T J , Junction Temperature (C)
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 10. Normalized On-Resistance vs. Temperature
10
Thermal Response ( Z thJC )
1
D = 0.50 0.20 0.10
0.1
0.05 0.02 0.01
P DM t1
0.01
SINGLE PULSE ( THERMAL RESPONSE )
t2
Notes: 1. Duty factor D = 2. Peak T t1/ t 2 +T C
J = P DM x Z thJC
0.001 1E-006 1E-005 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRLR2908/IRLU2908
EAS , Single Pulse Avalanche Energy (mJ)
15V
400
VDS
L
DRIVER
300
ID 9.3A 16A BOTTOM 23A TOP
RG
20V VGS
D.U.T
IAS tp
+ V - DD
A
200
0.01
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
100
0 25 50 75 100 125 150 175
Starting T J , Junction Temperature (C)
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy vs. Drain Current
10 V
QGS VG QGD
VGS(th) Gate threshold Voltage (V)
2.5
2.0
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
1.5
ID = 250A
1.0
50K 12V .2F .3F
D.U.T. VGS
3mA
+ V - DS
0.5 -75 -50 -25 0 25 50 75 100 125 150 175 200
T J , Temperature ( C )
IG ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage vs. Temperature
6
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IRLR2908/IRLU2908
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
100
0.01
10
Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses
0.05 0.10
1
0.1 1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
200
EAR , Avalanche Energy (mJ)
TOP Single Pulse BOTTOM 10% Duty Cycle ID = 23A
150
100
50
0 25 50 75 100 125 150 175
Starting T J , Junction Temperature (C)
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav ) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
Fig 16. Maximum Avalanche Energy vs. Temperature
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7
IRLR2908/IRLU2908
D.U.T
Driver Gate Drive P.W. Period VGS=10V
+
P.W.
Period
D=
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* * * * dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs
RD
VDS VGS RG 10V
Pulse Width 1 s Duty Factor 0.1 %
D.U.T.
+
-VDD
Fig 18a. Switching Time Test Circuit
VDS 90%
10% VGS
td(on) tr t d(off) tf
Fig 18b. Switching Time Waveforms
8
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IRLR2908/IRLU2908
TO-252AA (D-Pak) Package Outline
Dimensions are shown in millimeters (inches)
6.73 (.265) 6.35 (.250) -A5.46 (.215) 5.21 (.205) 4 6.45 (.245) 5.68 (.224) 6.22 (.245) 5.97 (.235) 1.02 (.040) 1.64 (.025) 1 2 3 0.51 (.020) MIN. 10.42 (.410) 9.40 (.370) LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN -B1.52 (.060) 1.15 (.045) 3X 2X 1.14 (.045) 0.76 (.030) 0.89 (.035) 0.64 (.025) 0.25 (.010) M AMB NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 4.57 (.180) 2 CONTROLLING DIMENSION : INCH. 3 CONFORMS TO JEDEC OUTLINE TO-252AA. 4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP, SOLDER DIP MAX. +0.16 (.006). 1.27 (.050) 0.88 (.035) 2.38 (.094) 2.19 (.086) 1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018)
0.58 (.023) 0.46 (.018)
2.28 (.090)
TO-252AA (D-Pak) Part Marking Information
Notes : T his part marking information applies to devices produced before 02/26/2001
EXAMPLE: THIS IS AN IRF R120 WITH ASSEMBLY LOT CODE 9U1P
INTERNATIONAL RECTIFIER LOGO AS SEMBLY LOT CODE
IRFU120 9U 016 1P
DATE CODE YEAR = 0 WEEK = 16
Notes: T his part marking information applies to devices produced after 02/26/2001
EXAMPLE: T HIS IS AN IRFR120 WIT H AS S EMBLY LOT CODE 1234 AS S EMBLED ON WW 16, 1999 IN THE ASS EMBLY LINE "A" PART NUMBER
IRFU120 12 916A 34
INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE
DAT E CODE YEAR 9 = 1999 WEEK 16 LINE A
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9
IRLR2908/IRLU2908
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
6.73 (.265) 6.35 (.250) -A5.46 (.215) 5.21 (.205) 4 6.45 (.245) 5.68 (.224) 1.52 (.060) 1.15 (.045) 1 -B2.28 (.090) 1.91 (.075) 9.65 (.380) 8.89 (.350) 2 3 NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH. 3 CONFORMS TO JEDEC OUTLINE TO-252AA. 4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP, SOLDER DIP MAX. +0.16 (.006). 6.22 (.245) 5.97 (.235) 1.27 (.050) 0.88 (.035) 2.38 (.094) 2.19 (.086) 0.58 (.023) 0.46 (.018) LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN
3X
1.14 (.045) 0.76 (.030)
3X
0.89 (.035) 0.64 (.025) M AMB
1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018)
2.28 (.090) 2X
0.25 (.010)
I-Pak (TO-251AA) Part Marking Information
Notes : T his part marking information applies to devices produced before 02/26/2001
EXAMPLE: T HIS IS AN IRFR120 WITH AS S EMBLY LOT CODE 9U1P INTERNATIONAL RECT IFIER LOGO AS SEMBLY LOT CODE DATE CODE YEAR = 0 WEEK = 16
IRFU120 016 9U 1P
Notes: T his part marking information applies to devices produced after 02/26/2001
EXAMPLE: T HIS IS AN IRFR120 WITH AS SEMBLY LOT CODE 5678 AS S EMBLED ON WW 19, 1999 IN T HE ASS EMBLY LINE "A" INT ERNATIONAL RECT IFIER LOGO ASS EMBLY LOT CODE PART NUMBER
IRFU120 919A 56 78
DAT E CODE YEAR 9 = 1999 WEEK 19 LINE A
10
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IRLR2908/IRLU2908
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR TRR TRL
16.3 ( .641 ) 15.7 ( .619 )
16.3 ( .641 ) 15.7 ( .619 )
12.1 ( .476 ) 11.9 ( .469 )
FEED DIRECTION
8.1 ( .318 ) 7.9 ( .312 )
FEED DIRECTION
NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481.
Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). Limited by TJmax, starting TJ = 25C, L = 0.71mH, RG = 25, IAS = 23A, VGS =10V. Part not recommended for use above this value. ISD 23A, di/dt 400A/s, VDD V(BR)DSS, TJ 175C. Pulse width 1.0ms; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. This value determined from sample failure population. 100% tested to this value in production. When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994.
Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 02/03
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